A low complexity dual-mode pulse-triggered FF design for wireless baseband processing is presented in this paper. It supports both\r\nsingle-edge- and double-edge-triggered operations subject to a mode select control. Due to the novelty in pulse generator design,\r\nthe layout area overhead is only 8% when compared with other single-mode counterpart design. Postlayout simulations in TSMC\r\n1P6M 0.18 ??m CMOS process model also indicate that the proposed design is as efficient as its single-mode counterpart in various\r\nperformance metrics.
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